Compaan Design realizes near-linear speed-up on JPEG 2000 benchmark.

During the recent Embedded Systems Conference in San Jose, Compaan Design demonstrated its ISO C HotSpot Parallelizer by parallelizing and compiling a JPEG 2000 compression algorithm to x86 multicore.  JPEG 2000 is an important compression algorithm that is used for large and high resolution images.

Compaan Design has benchmarked the JPEG 2000 compression code by: parallelizing it with the Compaan’s ISO C HotSpot Parallelizer, compiling it to an Intel x86 multicore, and running it with 3 images of 2048x2048 pixel input on an Intel x86 quadcore processor.

Within the Compaan Workflow the JPEG 2000 was first parallelized from a sequential implementation to a 6-stage pipeline.  Surprisingly, this resulted in a negligible 1.04 speed-up and required further Compaan analysis.

In a second Compaan Workflow iteration, execution tracing revealed a processing bottleneck in pipeline stage 4.  Pipeline stage 4 was further decomposed into three separate parallel processes.  This resulted in an improved performance at 2.7 speed-up.

In a third Compaan Workflow iteration, execution tracing further revealed that processing in pipeline stage 4 could even be more improved.  Pipeline stage 4 was increased from three to four processes. And additionally, pipeline stage 3 was decomposed into two separate parallel processes.  By now, the JPEG 2000 algorithm consisted of 10 separate parallel processes.  Upon execution, this amounted to a 3.7 speed-up.

The Compaan ISO C HotSpot Parallelizer realized its speed-ups of JPEG 2000 complementary to various C compilers and different levels of sequential code optimization. It adds a new domain of data parallelism and exploits that for multi-threaded and parallel multicore execution.

The benchmark’s full utilization of the Intel x86 quadcore CPUs suggests that further addition of cores could result in even higher speed-up.